1. Field of the Invention
The present invention generally relates to a circuit and a semiconductor device, and more particularly to a circuit and a semiconductor device for reducing the generation of shock noise of a power amplifier outputting amplified audio signals.
2. Description of the Related Art
FIG. 4 is a block diagram showing an example of an audio power amplifier. In the diagram, audio signals which are output from a signal source 10 are supplied to power amplifiers 12, 14. Inverse switch signals S1, S2 from terminals 16, 18 are supplied to the power amplifiers 12, 14, respectively, in which either one of the power amplifiers 12, 14 operates in response to the respective switch signals S1, S2. 
The power amplifier 12 is, for example, used for a headphone. The audio signals amplified with the power amplifier 12 are supplied to a headphone speaker 20, thereby allowing sound to be generated therefrom. The power amplifier 14 is, for example, used for a speaker. The audio signals amplified with the power amplifier 14 are supplied to a speaker 22, thereby allowing sound to be generated therefrom. 
FIG. 5 is a diagram showing an example of an output stage of a conventional power amplifier. In the diagram, audio signals are input between terminal 30a and terminal 30b according to differential input. The gates of p channel FETs (Field Effect Transistor) M1, M2 are connected to the terminals 30a, 30b, respectively, thereby forming a differential circuit of the FETs M1, M2 together with n channel FETs M3, M4, and p channel FET M5. 
A gate and a drain of p channel FET M6 are connected to a gate of FET M5, thereby forming a current mirror circuit. A drain of FET M6 is connected to a drain of n channel FET M7, and a gate of FET M7 is connected to a drain of FET M1. Accordingly, the output of the differential circuit of FETs M1, M2 is positively fed back to the differential circuit of FETs M1, M2 through a route of FETs M1, M7, M6, and M5. 
The gates of p channel FETs M11, M12 are connected to the terminals 30a, 30b, respectively, thereby forming a differential circuit of FETs M11, M12 together with n channel FETs M13, M14, and p channel FET M15. 
A gate and a drain of p channel FET M16 are connected to a gate of FET M15, thereby forming a current mirror circuit. The drain of FET M16 is connected to a drain of n channel FET M17, and a gate of FET M17 is connected to a drain of FET M12. Accordingly, the output of the differential circuit of FETs M11, M12 is positively fed back to the differential circuit of FETs M11, M12 through a route of FETs M12, M17, M16, and M15. 
The output of the differential circuit of FETs M1, M2 is supplied from a drain of FET M11 to a gate of FET M19, and the output of the differential circuit of FETs M11, M12 is supplied from a drain of FET M17 to the gate of p channel FET M18. FET M18, M19 are connected with a common drain, the source of FET M18 is connected to electric source Vcc, the source of FET M19 is grounded, and an output terminal 32 is connected to the drain of FETs M18, M19, thereby allowing audio signals to be output from the output terminal 32. 
The terminal 34 is supplied with a switch signal (S1 or S2). The terminal 34 is connected to a gate and a drain of p channel FET M20 and the gates of p channel FETs M21, M22, thereby forming a current mirror circuit of FETs M20, M21, and M22. A source of FET M20 is connected to a current generator 36. A drain of FET M21 is connected to a drain of p channel FET M24, and the drain and a gate of FET M24 are connected to the gate of FET M17, thereby forming a current mirror circuit. It is to be noted that the drain of FET M17 is connected to the drain and gate of FET M16 and the gate of FET M18, thereby forming a current mirror circuit. Furthermore, a drain of FET M22 is connected to a drain of p channel FET M25, and the drain and a gate of FET M25 are connected to the gates of FET M7 and M19, thereby forming a current mirror circuit. 
In a case where the switch signal is low level, FETs M20, M21, and M22 become “ON”, and accordingly, FETs M16, M17, M24, and M25 are turned “ON”. In such a case, FETs M18, M19 are in operation, and audio signals are output from the output terminal 32. On the other hand, in a case where the switch signal is high level, FETs M20, M21, and M22 become “OFF”, and accordingly, FETs M16, M17, M24, and M25 are turned “OFF”. Therefore, in such a case, FETs M18, M19 cease operation. 
In the conventional circuit shown in FIG. 5, the differential circuit of FETs M1, M2 is subjected to positive feedback via FETs M1, M7, M6, and M5. Furthermore, the differential circuit of FETs M11, M12 is subjected to positive feedback via FETs M12, M17, M16, and M15. Therefore, when the switch signal is changed from low level to high level, the output of audio signals from the output terminal 32 cannot be stopped unless the loops of the positive feedback are disconnected. 
Nevertheless, disconnection of the loops of the positive feedback cause change of the electric potential of the output terminal 32, and creates an abrupt change of electrical potential of electric source Vcc, or an abrupt ground potential. This raises a problem of the generation of shock noise.